Some applications
Protection of heterogeneous architectures on FPGA. An approach based on hardware firewalls

In summary, the solution presented above enables real-time protection of the internal communications and memories of a multiprocessor architecture implemented on an FPGA circuit. In the FPGA context, this solution can provide a complete protection flow from bitstream loading to application execution. Indeed, the bitstream (FPGA circuit configuration file) is encrypted (AES algorithm) by manufacturers such as Xilinx or Altera. By adding the architecture protection presented here, we can now protect an architecture integration in the FPGA against a given attack model from loading to real-time execution.