2. Reliability
Some programs with correct algorithms may exhibit unintended behavior at runtime. In a permissive language, in the total absence of typing, these behaviors can result in a hardware error: these errors, triggered at processor level, signal misuse of the processor. For example, consider the following C code, which performs a memory allocation at address p2, then seeks to access the memory address p1 directly following that of p2 ; when executed on certain processors (e.g. ARM, MIPS, IBM System/360 architectures, which are demanding in terms of memory alignment, unlike x86 architectures), this action causes a hardware error (bus error) of access to a "non-aligned" address, as the bus linking the processor to memory cannot directly read or write addresses that are not...
You do not have access to this resource.
Exclusive to subscribers. 97% yet to be discovered!
Already subscribed?
Log in!
Ongoing reading
Reliability