Standard extensions
Risc-V: an open source instruction set

The RV32M version defines multiplication and division instructions operating on 32-bit integer registers and providing a 32-bit result:

• four multiplication instructions: mul outputs the 32 least significant bits. The other three deliver the 32 most significant bits (mulh with signed data, mulhu with unsigned data and mulhsu with signed and unsigned data);

• four 32-bit by 32-bit division instructions: div and divu for signed and unsigned data, rem and remu for signed and unsigned remainders.

RV64M extends the operations of RV32M to 64 bits...