1. Managing switching constraints
In an idealized switching cell such as that shown in figure 1, the laws of meshes and nodes (v 1 + v 2 ≥ V; i 1 – i 2 ≥ I ) imply that at the time of spontaneous switching of switch 2 (v 2 ≥ 0 ; i 2 ≥ 0), switch 1 undergoes significant voltage and current stress (v 1 ≥ V ; i 1 ≥ I ), which is incompatible with the very notion of a perfect switch. To study switching mechanisms further, we must therefore abandon the model of the idealized switching cell (ideal sources, switches and wiring).
In practice, it is the imperfections of semiconductor components (switching time, limited current, coupling between power and control...
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Managing switching constraints