Two-order IIR NGD circuit design on STM32 microcontroller : Digital negative-time circuit theory with Infinite Impulse Response (IIR)

Digital negative-time circuit theory with Infinite Impulse Response (IIR)
Two-order IIR NGD circuit design on STM32 microcontroller

Authors : Blaise RAVELO, Mathieu GUÉRIN, Wenceslas RAHAJANDRAIBE, Lala RAJAOARISOA

Publication date: June 10, 2023 | Lire en français

Add to my library

2. Digital negative-time circuit theory with Infinite Impulse Response (IIR)

To date, most CTNS studies have focused on analog circuits.

You do not have access to this resource.

Exclusive to subscribers. 97% yet to be discovered!

You do not have access to this resource. Click here to request your free trial access!

Already subscribed? Log in!

Ongoing reading
Digital negative-time circuit theory with Infinite Impulse Response (IIR)

(1) - RAVELO (B.) - First-order low-pass negative group delay passive topology. - Electronics Letters, vol. 52, vo. 2, p. 124-126 (2016).
(2) - RAVELO (B.) - Demonstration of negative signal delay with short-duration transient...

You do not have access to this resource.

Exclusive to subscribers. 97% yet to be discovered!

You do not have access to this resource. Click here to request your free trial access!

Already subscribed? Log in!

Article included in this offer

Updated and enriched with articles validated by our scientific committees

Services

A set of exclusive tools to complement the resources