Frequently encountered difficulties and a few clarifications
AMS extension of the VHDL language for power electronics
Article REF: D3067 V1
Frequently encountered difficulties and a few clarifications
AMS extension of the VHDL language for power electronics

Author : Yannick HERVÉ

Publication date: November 10, 2005 | Lire en français

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4. Frequently encountered difficulties and a few clarifications

The difficulties encountered in the early stages of learning are always the same. For example, beginners who have mastered the syntax forget to include a wait instruction in the process, causing the simulator to starve, as the clock can no longer advance. Simulators are not always forthcoming about this error.

Modeling involving interaction between analog and digital simulation kernels must absolutely be based on the use of the break instruction to generate analog simulation points at the right time, and the above attribute to locate precisely on the time scale the position of a transition of one quantity in relation to a threshold, or of one quantity in relation to another. Any mixed model not involving these methods is formally false and, although apparently correct, may reveal strong malfunctions under different conditions of use or on a different simulator....

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