3. Analysis, sizing and optimization of interconnections

Previous results have shown that it is possible to simulate the behavior of a complete power electronics structure very accurately, without the need for realization, and with far more measurement resources available virtually than in the real world, where any insertion of a current sensor significantly modifies the geometry and therefore the very nature of the unbalance.

However, while this use of the "virtual prototype" (or "digital clone") is undeniably useful to the designer, it does not allow easy analysis or dimensioning of interconnections, except by a "trial-and-error" method, which is not very cost-effective in terms of time spent. This section will illustrate how the designer can analyze interconnect parameters directly in the PEEC tool, in order to size or even optimize them, based on already known criteria such as inductance value or impedance symmetry....