Protecting multiprocessor architectures on FPGAs
Protection of heterogeneous architectures on FPGA. An approach based on hardware firewalls
Research and innovation REF: IN175 V1
Protecting multiprocessor architectures on FPGAs
Protection of heterogeneous architectures on FPGA. An approach based on hardware firewalls

Authors : Pascal COTRET, Guy GOGNIAT

Publication date: February 10, 2014 | Lire en français

Logo Techniques de l'Ingenieur You do not have access to this resource.
Request your free trial access! Free trial

Already subscribed?

2. Protecting multiprocessor architectures on FPGAs

For the purposes of this article, multiprocessor architectures are limited to simple cases (2 processors maximum) implemented on FPGA circuits. Although the proposed mechanisms are not dedicated to any particular FPGA, they have been implemented on circuits from the Virtex-6 family from Xilinx.

2.1 Threat model

According to § 1 ...

You do not have access to this resource.
Logo Techniques de l'Ingenieur

Exclusive to subscribers. 97% yet to be discovered!

You do not have access to this resource. Click here to request your free trial access!

Already subscribed?

Ongoing reading
Protecting multiprocessor architectures on FPGAs

Article included in this offer

"Software technologies and System architectures"

( 227 articles )

Complete knowledge base

Updated and enriched with articles validated by our scientific committees

Services

A set of exclusive tools to complement the resources

View offer details
Contact our team FAQ