6. Embedded OS architectures

While heterogeneous hardware architectures are efficient from the point of view of peak performance (i.e. the performance that can be achieved by using the hardware to its full potential) and MIPS per Watt (number of instructions executed for a given energy consumption), they suffer from an obvious programming difficulty that can be summarized by the following three points:

1. Architectural differences. Processors may have different instruction sets, different word sizes (e.g. 32 bits for a general-purpose processor and 24 bits for a signal processor), and/or different memory representations (word byte order or endianness);

2. Non-standardized memory access. The areas of memory accessible by each processor may be different, may even be at different or overlapping addresses, and may require the use of specialized hardware...