From FDSOI to emerging, quasi-SOI and hybrid technologies
Fully Depleted SOI Devices: More Moore applications and New Architectures

Multi-gate devices with tunneling between source, channel and drain (TFET), making it possible to obtain low inversion slopes of less than 60 mV I / I decade, are of interest for very low voltage/consumption circuits which represent the greatest challenge for future generations of nanoelectronic devices. Figure  14 shows an example of silicon TFET, fabricated with opposite source and drain dopings, whose performance in the ON state is greatly improved using two gates, a thin Si layer and a high permittivity gate dielectric.