Towards the ideal memory
Evolution of semiconductor random access memories

A trade association, ITRS (International Technology Roadmap for Semiconductors), representing the industry's main trade associations, publishes a report every two years giving forecasts on the future of semiconductors. Current IC manufacturing technologies are reaching their limits. There is what specialists call the red brick wall, which represents the physical limit of etch finesse. The definition of etch finesse differs according to the type of component. For example, for flash EEPROM memory, it's the minimum distance between two polysilicon tracks. On the other hand, for memory and MPU (MicroProcessor Unit), it's the minimum distance between two M1 metal tracks, from which ITRS has defined the half-pitch F. The evolution of the engraving finesse of an integrated circuit depends on physical, technological and, of course, economic parameters. Figure