CMOS Integrated Circuits on Silicon

CMOS technology is the dominant technology for the production of integrated circuits. The regular appearance of new generations, called technology nodes, increases the number of transistors per chip according to an empirical law, Moore's Law, which has applied for over 50 years. In 2019, this technology will make it possible to produce microprocessors or graphics processors with several tens of billions of transistors.

The aim of this article is to explain how, based on the characteristics of the technology and the transistors, circuits with such a large number of transistors can be realized.

CMOS technology, with its associated circuitry, replaced nMOS technologies because it exhibited no static power dissipation. As it happens, leakage currents in bulk technologies used up to 28 nm nodes became too high, and static power became critical. Thin-film CMOS technologies, with FinFET and FDSOI versions, have been used since the 28 nm and 20 nm nodes. These are described in a dedicated chapter.

All CMOS technology nodes need to be characterized, in order to provide operational operator libraries that can be used by CAD tools. This characterization includes extraction of electrical parameters, temperature operation, measurement of parameter dispersions, and protection techniques against abnormal operation: CMOS latch-up, radiation, and input/output protection.

The elementary gates of cell libraries are also characterized. The CMOS inverter is studied in detail: operating principle, static characteristic, dynamic characteristic, power dissipation. NAND, NOR, transmission and XOR gates are also presented. The design of sequential circuits and memories is presented in other articles [E 181][E 2 491] .

Last but not least, these elementary cell libraries would be useless without Computer Aided Design (CAD) tools, which are indispensable for designing digital circuits known as VLSI (Very Large Scale Integration). The design flows used are described. They can be broken down into two areas. The front-end includes circuit functionality description, simulation steps, logic synthesis and validation. The back-end includes floorplanning, standard cell placement, clock tree synthesis, connection routing and final verification.

Thanks to this article, the reader should be able to grasp the issues and problems involved in the design of complex digital...