Parallelism evolution
Fully programmable graphics processors (GPU)
Quizzed article REF: H1013 V1
Parallelism evolution
Fully programmable graphics processors (GPU)

Authors : Daniel ETIEMBLE, David DEFOUR

Publication date: November 10, 2018, Review date: January 5, 2021 | Lire en français

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6. Parallelism evolution

CUDA makes it possible to reconcile the need for hierarchical computing on the hardware side with the exploitation of parallelism on the software side. At the software level, a computational kernel is defined to run on a data set according to the SPMD (Single Program Multiple Data) model. In this model, threads are structured in a grid of thread blocks. The grid is launched on one or more GPUs, each block is supported by a Streaming Multiprocessor (SM), and the threads are supported by the compute cores that make up the SMs. Several types of scheduler are required, which has an impact on the communication and synchronization mechanisms between threads. In this section, we detail developments in these two areas.

6.1 Schedulers

Grids, blocks and threads are scheduled...

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