Implementation

In this section, we study the classical architecture of a decoder implementing the Max-Log-MAP algorithm. Although inferior in terms of performance, this algorithm is preferred to the MAP algorithm because its complexity in terms of number of logic gates is lower. This is because it uses simple arithmetic operators, whereas the MAP algorithm requires more complex operators such as multiplication.

Let's specify the Max-Log-MAP algorithm. The desired result is Q (c _i , t ) for each index i of the received frame and each Boolean value t. We therefore need the values Q (x _i , t ) and Q (r _i , t...