Introduction to hardware/software codesign. A general overview

Integrated circuits enable the integration of logic functions on a silicon chip, based on a single element - the transistor. The power of these circuits increases with the number of transistors, but there is a limitation. Indeed, thermal dissipation becomes too high in the presence of a large number of components. Parallel architectures offer an interesting solution to this limitation, since power dissipation no longer varies exponentially with computing power, as in a single-processor machine, but linearly in a multi-processor machine.

Significant developments are also taking place at software and application level. In view of all these changes, the hardware/software "co-design" methodology offers an interesting solution for the efficient implementation of systems-on-chip.

This article provides an overview of the general principles and concepts relating to joint hardware/software design. This is organized around the main stages of a classical design flow: first, we address the issue of specification and modeling; then, we introduce the challenges of hardware/software partitioning, followed by a general presentation concerning synthesis and verification techniques; finally, methodological aspects are discussed through an illustration based on a few model-based joint design environments. As an open discussion on a possible evolution of current practices in hardware/software joint design, we offer a brief reflection on emerging technologies and new computational paradigms.