Examples of "restricted data flow" processors
Out-of-order superscalar processors
Article REF: H1011 V1
Examples of "restricted data flow" processors
Out-of-order superscalar processors

Authors : François ANCEAU, Daniel ETIEMBLE

Publication date: January 10, 2018, Review date: August 3, 2022 | Lire en français

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5. Examples of "restricted data flow" processors

We present a few examples of processors with "unordered" execution in order to highlight a few key characteristics that will help us understand developments in several respects:

  • the relationship between architectural choices and underlying hardware. This is illustrated in particular by the limitation of the sizes of associative memories used to implement the "data flow", or even their replacement by addressing mechanisms for machines with a low number of entries in the reservation stations;

  • the limited evolution of these processors since their appearance in the late 1990s. The main evolution has been the more or less advanced development of simultaneous multi-threaded execution. They have also become the core of multi-core processors, but without any fundamental change in the microarchitecture of a core.

  • ...
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