Article | REF: H1012 V1

VLIW processors

Author: Daniel ETIEMBLE

Publication date: August 10, 2015, Review date: March 8, 2022 | Lire en français

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    5. Conclusion

    The VLIW approach, based on the compiler's static scheduling of instructions in a very long instruction, favors the use of the software pipeline, usually combined with loop unwinding to execute the maximum number of instructions in parallel in the different functional units. While software-only control of data and control dependencies simplifies hardware implementation, variants use hardware control of dependencies and techniques such as branch predictors to take into account at runtime what is not known at compile time.

    The VLIW approach has been and continues to be very successful in specialized signal processors: the best example is the TMS320C6x series from Texas Instruments. It is also widely used in System-on-Chip (SoC) coprocessors for signal processing. In this field, it combines high performance with low power consumption.

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