Securing an electronic hardware architecture
Securement of mechatronic .Context and hardware architecture
Article REF: BM8070 V2
Securing an electronic hardware architecture
Securement of mechatronic .Context and hardware architecture

Author : Jean-Louis BOULANGER

Publication date: December 10, 2021 | Lire en français

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3. Securing an electronic hardware architecture

At hardware architecture level, the main failure is linked to the emission of an erroneous output. There are two possibilities:

  • wrongly issuing a permissive exit, which causes a safety problem (e.g. turning a traffic light green and wrongly authorizing the passage of a vehicle);

  • wrongly issuing a restrictive output, resulting in an availability problem (e.g. rail convoys at a standstill).

Depending on the impact of the absence of output, it is possible to define two families of systems:

  • systems with integrity; there must be no erroneous output (wrong data or correct data at an incorrect time, etc.). Systems with integrity are systems where the process is irreversible (e.g. banking transactions). For this kind of system, it's...

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