Conclusion
Evolution of semiconductor random access memories

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Conclusion
Evolution of semiconductor random access memories

Author : Philippe DARCHE

Review date: January 5, 2021 | Lire en français

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8. Conclusion

For performance reasons, most RAM is synchronous. The cost of the dynamic version, with its packet communication and higher throughput, restricts it to high-performance graphics and server applications. For applications with very low power consumption, such as systems backed up by autonomous energy sources, the static asynchronous solution may be chosen. Low-power versions of dynamic memory are appearing, such as LPDDR (Low-Power DDR) SDRAM, to meet the throughput needs of increasingly powerful nomadic systems. They replace the pseudo-static model (PSRAM for Pseudo SRAM) with a dynamic core but an asynchronous static interface. The capacity of a DDR4 SDRAM peaks at 32 Gb with vertically assembled chips, the technology enabling up to 12 to be stacked per case at Samsung (in 2019).

Programmable read-only memory (i.e. mainly flash) seeks to reduce its write time and...

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