Interface evolution
Evolution of semiconductor random access memories

The interface has long been neglected by designers. You could say it remained static for the first ten years after it was first marketed. Classically, memory requires an address, an I/O port for DQ information and control signals, at the very least the specification of the R/#W access type. To communicate with the processor, dedicated buses are required. These are the address, data and control buses. To increase throughput, it was proposed to increase the width of the data and address paths. The static RAM interface began to evolve in the late 1970s, with the use of an external clock signal. Dynamic RAM followed in the early 1990s with the SDRAM model.