3. Control logic evolution
The control logic (figure
12
), peripheral to the memory plane, mainly
concerns the word line address decoder, the bit line conditioner,
the SA sense amplifier, and the column multiplexer (MUX). The latter
groups together column address decoding and column selection functions.
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Control logic evolution
Bibliography
-
(1) - DARCHE (P.) -
Architecture des ordinateurs – Mémoires à semi-conducteurs :
Principe de fonctionnement et organisation interne des mémoires vives.
-
Volume 1. Éditions Vuibert. ISBN 978-2-311-00476-2 (2012).
-
(2) - SIDDIQI...
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