Simulation of negative-time circuits
Two-order IIR NGD circuit design on STM32 microcontroller
Research and innovation REF: IN408 V1
Simulation of negative-time circuits
Two-order IIR NGD circuit design on STM32 microcontroller

Authors : Blaise RAVELO, Mathieu GUÉRIN, Wenceslas RAHAJANDRAIBE, Lala RAJAOARISOA

Publication date: June 10, 2023 | Lire en français

Logo Techniques de l'Ingenieur You do not have access to this resource.
Request your free trial access! Free trial

Already subscribed?

4. Simulation of negative-time circuits

As a virtual proof-of-concept, simulations using NI® LabVIEW® software were carried out to verify the suitability of the theory and design method of the numerical PB NTCs described above. The following paragraphs present the results obtained.

4.1 Description of simulation parameters

Two different proofs of concept were investigated during the simulations. These proofs of concept are attached to two types of signals without sudden instantaneous variations or discontinuities noted x 1 and x 2 of duration of the order of one second and one hour. These are non-symmetrical Gaussian waveform signals with a peak-to-peak amplitude of V max ...

You do not have access to this resource.
Logo Techniques de l'Ingenieur

Exclusive to subscribers. 97% yet to be discovered!

You do not have access to this resource. Click here to request your free trial access!

Already subscribed?


Article included in this offer

"Electronics"

( 262 articles )

Complete knowledge base

Updated and enriched with articles validated by our scientific committees

Services

A set of exclusive tools to complement the resources

View offer details