5. Addressing modes

The use of parallel memory banks can, as we have seen, increase memory bandwidth. However, there is still the problem of instruction size. The solution lies in the use of indirect register addressing modes. A set of "address registers" is provided for this purpose. These registers are loaded with the address of a word in a data structure (for example, the first or last sample in an array of data to be filtered). Instructions accessing the data structure specify, or implicitly use, this register as the one containing the address. As the size of the register bank is limited, only a few bits are needed to encode the number of the register in question. As the updating of registers containing memory addresses is carried out in a unit independent of the main computing unit (ALU), this minimizes the number of register loading instructions required.

Let's consider the case...