Conclusion
Formal methods for the verification of embedded systems
Article REF: H8250 V1
Conclusion
Formal methods for the verification of embedded systems

Author : Emmanuelle ENCRENAZ-TIPHENE

Publication date: February 10, 2013 | Lire en français

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6. Conclusion

The field of formal methods abounds. Numerous research projects have contributed to the emergence of a wide range of different methods, each adapted to deal with a particular aspect of verification. Some academic proposals have led to successful industrial transformations: model-checking by BDD and SAT is fully integrated into the design flow of CAD software manufacturers. Software analysis using abstract interpretation or modeling methods – verification – production of code or circuits resulting from work on synchronous languages are commonly used in the aeronautics industry. Method B is used in the railway industry. Assisted proof has been implemented to certify extremely complex compilers, and is integrated into the Intel processor design flow as an integral part of validation. These different approaches are not mutually exclusive. They complement each other to increase the degree of...

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