Formal methods for functional verification
Formal methods for the verification of embedded systems
Article REF: H8250 V1
Formal methods for functional verification
Formal methods for the verification of embedded systems

Author : Emmanuelle ENCRENAZ-TIPHENE

Publication date: February 10, 2013 | Lire en français

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3. Formal methods for functional verification

Formal verification of a system's functional properties consists of using a formal model describing the system's behaviors and a specification model defining expected behavior templates, to determine by mathematical reasoning (possibly automated in an algorithm where possible) whether the behaviors of the system model comply with the templates defined by the specification.

The different approaches to functional verification vary according to :

  • the nature of the model to be analyzed ;

  • the nature of the properties to be verified.

  • Nature of the model to be analyzed. The model can be finite (for example, a cache coherence protocol studied for a 5-cache model) or parameterized (the same...

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