From planar MOSFET to multi-gate and 3D architectures
Fully Depleted SOI Devices: More Moore applications and New Architectures
Quizzed article REF: E2382 V1
From planar MOSFET to multi-gate and 3D architectures
Fully Depleted SOI Devices: More Moore applications and New Architectures

Author : Francis BALESTRA

Publication date: May 10, 2019, Review date: January 18, 2021 | Lire en français

Logo Techniques de l'Ingenieur You do not have access to this resource.
Request your free trial access! Free trial

Already subscribed?

2. From planar MOSFET to multi-gate and 3D architectures

In thin and/or lightly doped silicon films, the simultaneous activation of the front and back channels by 2, 3 or 4 gates induces the phenomenon of volume inversion. Unknown in bulk silicon MOS devices, this effect allows the inversion charge to cover the entire silicon film, giving rise not only fully depleted, but also fully inverted devices. The resolution of the Poisson and Schrödinger equations indicates that the maximum density of the inversion charge is obtained at the center of the film. This causes increases in transconductance and drain current in the ON state, a decrease in the influence of interface defects (traps, fixed charges, roughness) and low frequency 1/ f noise. A low subthreshold slope close to 60 mV/decade down to sub-deca-nanometric gates is possible with this type of transistor architecture. Multiple-gate MOSFETs (double gate...

You do not have access to this resource.
Logo Techniques de l'Ingenieur

Exclusive to subscribers. 97% yet to be discovered!

You do not have access to this resource. Click here to request your free trial access!

Already subscribed?


Ongoing reading
From planar MOSFET to multi-gate and 3D architectures

Article included in this offer

"Electronics"

( 262 articles )

Complete knowledge base

Updated and enriched with articles validated by our scientific committees

Services

A set of exclusive tools to complement the resources

View offer details