Conclusion
Processors : pipelined execution of instructions
Article REF: H1004 V1
Conclusion
Processors : pipelined execution of instructions

Authors : Daniel ETIEMBLE, François ANCEAU

Publication date: August 10, 2013, Review date: March 4, 2022 | Lire en français

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4. Conclusion

We've looked at the essential features of pipelines used in scalar processors, which start executing a new instruction at each clock cycle. While the principle of pipelining is simple, control instructions (jumps, branches, procedure calls and returns) break the sequential execution of instructions, which is the very basis of pipelined operation. Similarly, the fact that the operations performed by certain instructions require several clock cycles introduces the fundamental problem of data dependencies. While name dependencies can be eliminated by hardware techniques, true consumer production type dependencies must be controlled, either by hardware or software, and software techniques such as loop unwinding or software pipelining are required to ensure that dependencies do not result in pipeline hangs.

Until the mid-2000s for general-purpose processors, and again...

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