RV32I basic instruction set
Risc-V: an open source instruction set
Quizzed article REF: H1201 V1
RV32I basic instruction set
Risc-V: an open source instruction set

Author : Daniel ETIEMBLE

Publication date: May 10, 2020, Review date: January 5, 2021 | Lire en français

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2. RV32I basic instruction set

The basic instruction set, called RV32I, comprises 47 instructions. There are 32 32-bit registers named x0 to x31 and a program counter (pc). Register x0 contains 0 and can be used as the destination register of an instruction when the result is not used.

2.1 Instruction format

Instructions are of fixed 32-bit size, with a 7-bit opcode, i.e. 128 fundamental opcodes (table 1 ). For RV32I, the two bits [1:0] of the opcode are 11, which means that the remaining 75% of opcodes are available for the various extensions presented in Chapters 3, 4 and 5. On the other hand, only 11 of the 32 opcodes are actually used, i.e. 8.6% of the total number of fundamental opcodes.

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