Standard extensions
Risc-V: an open source instruction set
Quizzed article REF: H1201 V1
Standard extensions
Risc-V: an open source instruction set

Author : Daniel ETIEMBLE

Publication date: May 10, 2020, Review date: January 5, 2021 | Lire en français

Logo Techniques de l'Ingenieur You do not have access to this resource.
Request your free trial access! Free trial

Already subscribed?

4. Standard extensions

A number of standard extensions have been defined

4.1 Extension M: multiplication and division over integers

The RV32M version defines multiplication and division instructions operating on 32-bit integer registers and providing a 32-bit result:

  • four multiplication instructions: mul outputs the 32 least significant bits. The other three deliver the 32 most significant bits (mulh with signed data, mulhu with unsigned data and mulhsu with signed and unsigned data);

  • four 32-bit by 32-bit division instructions: div and divu for signed and unsigned data, rem and remu for signed and unsigned remainders.

RV64M extends the operations of RV32M to 64 bits...

You do not have access to this resource.
Logo Techniques de l'Ingenieur

Exclusive to subscribers. 97% yet to be discovered!

You do not have access to this resource. Click here to request your free trial access!

Already subscribed?


Article included in this offer

"Software technologies and System architectures"

( 227 articles )

Complete knowledge base

Updated and enriched with articles validated by our scientific committees

Services

A set of exclusive tools to complement the resources

View offer details