Risc-V: an open source instruction set

Processor instruction sets are the interface between hardware and software. Their instructions define the operations to be performed by the hardware, and are the target of a compiler. For historical reasons, instruction sets are generally proprietary. Since 2010, an open-source instruction set has been defined at UC Berkeley under the name RISC-V. Its aim is to play the same role for instruction sets as Linux plays for operating systems or OpenOffice for office suites.

The conditions for a successful open source instruction set are defined: a large number of potential users, an existing software environment, a high-performance instruction set that can be used on a wide range of applications.

RISC-V has a core 32-bit instruction set for integer computation, which is the basis for microcontrollers and low-end processors. In addition, there are a number of standardized or potentially standardized extensions. To achieve a 32-bit or 64-bit instruction set comparable to proprietary instruction sets such as Intel or ARM, extensions for 64-bit integers, integer multiplication and division, 32-bit floats, 64-bit floats, atomic instructions for memory coherence have been standardized. Other extensions are currently being developed and standardized. The 16-bit extension is designed for compact code for embedded applications. SIMD and vector extensions are aimed at high performance, etc.

The RISC-V foundation created in 2015 brings together a community of over 250 players (silicon founders, ASIC or IP circuit suppliers, software developers). A significant number of circuits or IPs implementing the RISC-V instruction set are available, along with the necessary software environment: simulators, debuggers, compilers and libraries, loaders and monitors, operating system kernels, Linux distributions, real-time operating systems, etc.