Surface treatments for microelectronics connections

Historically, microelectronics chip packaging technologies could accommodate backplane mounting of the chips on the circuit, for the simple reason that the performance of electronic devices was not substantially compromised by their packaging or board assembly. For many years, the reference technique in this field was wire bonding, where each chip pad is individually connected to the circuit. Although this is still the most widely used technique (particularly in the industrial sector), as the performance of components continues to evolve, highly sophisticated electronic devices can no longer be satisfied with the "perimeter" connections made possible by this technique. For example, today's mobile applications are strongly affected by the reduction in size and weight (i.e. ever-smaller components with reduced interconnection pitches) and by a demand for very high performance that cannot be penalized by delays in electrical signal propagation or by constraints on electrical power distribution (increasingly high frequencies). Compared with wire bonding ("face-up" technology), we had to devise a technology that would significantly increase the number of electrical interconnections (surface integration). Flip chip" (face-down) technology makes it possible to achieve high interconnection density (numerous electrical inputs/outputs), high performance (shorter connections, low inductance and low noise), reduced component size and smaller packaging. The surface treatments involved in this process are numerous, and the interconnection layers are equally varied. That's why we've decided to present the latest developments in this field in this dossier.