Test plan and validation

Methodology of the EMC design - Equipment

Figure 1 - Illustration of the V-shaped development cycle

Figure 2 - Bottom-up approach

Figure 3 - Impedance per square of a square ground plane without holes

Figure 4 - Example of where to connect the electronic ground to the chassis

Figure 5 - Return flow in the ground plane

Figure 6 - Routing a pi filter

Figure 7 - Illustration of the crosstalk problem

Figure 8 - Bad example of mass filter referencing

Figure 9 - Good example of mass filter referencing

Figure 10 - Segregation of feed plans

Figure 11 - Mass reserve at the edge of the map

Figure 12 - Common error when placing vias

Figure 13 - Bad example of capacitor routing

Figure 14 - Good example of mass filter referencing

Figure 15 - Generic equivalent diagrams of common passive components

Figure 16 - Elemental Conducted Emissions Model – ICEM

Figure 17 - Schematic diagram of the one ohm measurement technique

Figure 18 - Circuit emission envelopes measured using the one-ohm technique, with or without decoupling capacitor (1 nF)

Figure 19 - Schematic diagram of the DPI test applied to the characterization of a logic input

Figure 20 - Simplified equivalent diagram of emissions measurement on RSIL

Figure 21 - Spectrum of conducted emissions, for different distances between the decoupler and the component to be filtered

Figure 22 - Simplified equivalent diagram for characterizing the immunity of a logic input embedded in a printed circuit board.

Figure 23 - Examples of the types of test that can be used, depending on the frequency band. Frequencies are indicative only, and may vary according to application and use.

Figure 24 - Example of a synthetic beam description

Figure 25 - General view of test configuration with load bench

Figure 26 - Detailed view of the load bank

Figure 27 - Injection method to highlight beam dispersion

Figure 28 - Thread distribution for two random draws

Figure 29 - Dispersion of common mode current calculation results due to beam changes