2D power module
Packaging of power module

Article REF: E3385 V2

2D power module
Packaging of power module

Author : Raphaël RIVA

Publication date: December 10, 2020 | Lire en français

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1. 2D power module

The packaging of the power module is the close environment of the semiconductor chips. It must meet certain conditions to ensure the correct operation of the chips:

mechanical resistance: the packaging must protect the chip from moisture, dust and static electricity . It protects it mechanically by means of a cover,...

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Semiconductor chips

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Bibliography

Bibliography

(1) - MASSON (A.), SABBAH (W.), RIVA (R.), BUTTAY (C.), AZZOPARDI (S.), MOREL (H.), PLANSON (D.), MEURET (R.) - Die attach using silver sintering. Practical implementation and analysis. - European Journal of Electrical Engineering, vol. 16, n° 13-14, p. 293-305, août 2013.
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