Power consumption: a key criterion in system-on-chip design
Power management techniques in system on chips
Article REF: H8270 V1
Power consumption: a key criterion in system-on-chip design
Power management techniques in system on chips

Authors : Michel AUGUIN, François VERDIER, Hend AFFES

Publication date: July 10, 2016 | Lire en français

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1. Power consumption: a key criterion in system-on-chip design

The first generations of embedded electronic systems may have required particular optimization in terms of energy consumption (e.g. satellite electronics). However, these systems were mainly specific, and the need for low-power design standards and tools did not really emerge. As already mentioned, mobility (e.g. computers, telephones, PDAs, tablets) was the first factor to lead circuit designers to consider energy consumption as an important criterion justifying adapted techniques and tools. The manufacturers concerned then needed approaches clearly supported by silicon foundries and electronic CAD tools to produce circuits with controlled energy consumption. In 2003, for example, the conclusion of an article in HP

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