Miniaturization, transistor optimization, and parasitic effects
CMOS technologies - MOS transistor

Article REF: E2430 V3

Miniaturization, transistor optimization, and parasitic effects
CMOS technologies - MOS transistor

Author : Joris LACORD

Publication date: May 10, 2026 | Lire en français

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4. Miniaturization, transistor optimization, and parasitic effects

This section will begin with a description of how to improve transistor performance by optimizing the ratio $I_{ON} / I_{OFF}$ . The associated limiting or adverse effects will then be explained in the context of the scaling down dictated by Moore’s Law.

4.1 Optimization of the ION/IOFF ratio

Optimize the ratio $I_{ON}$

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Bibliography

(1) - MATHIEU (H.) - Physique des semi-conducteurs et des composants électroniques. - Dunod (2009).
(2) - SZE (S.M.) - Physics of Semiconductor Devices 2 ^nd Edition. - Willey (1981).

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