Encapsulation processes
Packaging and interconnection processes for electronics components
Article REF: E3401 V1
Encapsulation processes
Packaging and interconnection processes for electronics components

Author : Gilles POUPON

Publication date: April 10, 2016, Review date: February 21, 2023 | Lire en français

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4. Encapsulation processes

There are two distinct packaging families:

  • individual, at chip level: after cutting out the manufacturing substrate, each component is extracted and assembled separately in its final package. There are many different types of packaging, most of which have been developed to meet specific application needs and, of course, performance expectations. To achieve this, different types of enclosure (metal, ceramic, plastic) are used, with the emphasis on hermetic sealing. There is a wide variety of enclosures and manufacturers;

  • wafer scale packaging: this process enables chips to be packaged collectively before the manufacturing substrate is cut, thereby reducing costs and reducing the size of the final component before assembly. It is often likened to wafer level packaging.

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