Test of integrated digital circuits - Design For Testability

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Test of integrated digital circuits - Design For Testability

Authors : Mounir BENABDENBI, Régis LEVEUGLE

Publication date: May 10, 2022 | Lire en français

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Overview

ABSTRACT

Integrated circuits digital testing consists in detecting all defects that may appear during the manufacturing step or when the chip is embedded in its environment. For that purpose, it is mandatory to check during the design phase if the circuit has the minimal testability features required before being sent to production. This article presents the problematic and the testability concepts. It describes also the main Design For Testability (DFT) techniques used in the semiconductor industry. The described DFT techniques target different levels of the hierarchy, from the basic digital bloc to the 3D System on a Chip (SoC), up to board testing.

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AUTHORS

  • Mounir BENABDENBI : Senior Lecturer at Grenoble Polytechnic Institute (Grenoble INP) - Laboratoire des Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Grenoble, France

  • Régis LEVEUGLE : Professor at Grenoble Polytechnic Institute (Grenoble INP) - Laboratoire des Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Grenoble, France

 INTRODUCTION

The article [E 2 460] entitled "Testing digital integrated circuits – Basics and developments" introduces the main concepts in the field. This article is the second part of a series devoted to the testing of digital integrated circuits, and focuses on the design phase of the integrated circuit, a stage in which it is now essential to take into account its testability in production. Thanks to the use of these design techniques, if a fault occurs during manufacture, it can be detected at the time of testing, and the faulty circuit is then eliminated or repaired.

After defining the criteria for circuit testability, we explore the various architectural techniques that can be integrated during design, whether for simple digital blocks or complex integrated systems. The main standards used in the industry are briefly presented. For more information, the reader can find links to the standards cited in the bibliographic appendix. We also introduce the basic techniques to be used for on-line testing, i.e. testing that takes place while the application is running. Computer-aided design (CAD) software takes circuit testability into account, and its features are described in detail.

We'll see that the proposed techniques introduce additional costs in terms of silicon area and power consumption, and lead to a slight reduction in performance. However, these techniques, and the extra cost they entail, are essential to guarantee the user a minimum level of quality and reliability. Any integrated circuit or system produced today embeds one or more of the solutions mentioned in this article.

A glossary of terms is provided at the end of the article.

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KEYWORDS

testability   |   controllability   |   observability   |   DFT

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